ECO32 Instruction Set Architecture

Format Description
N no operands
RH one register and the lower 16 bits of a word
RHH one register and the upper 16 bits of a word
RRH two registers and a zero-extended halfword
RRS two registers and a sign-extended halfword
RRR three registers
RRX three registers, or two registers and a zero-extended halfword
RRY three registers, or two registers and a sign-extended halfword
RRB two registers and a sign-extended 16 bit offset
J no registers and a sign-extended 26 bit offset
JR one register

Mnemonic Operands Description Format
add dst, op1, op2 dst := op1 + op2 RRY
sub dst, op1, op2 dst := op1 - op2 RRY
mul dst, op1, op2 dst := op1 * op2, signed RRY
mulu dst, op1, op2 dst := op1 * op2, unsigned RRX
div dst, op1, op2 dst := op1 / op2, signed RRY
divu dst, op1, op2 dst := op1 / op2, unsigned RRX
rem dst, op1, op2 dst := remainder of op1/op2, signed RRY
remu dst, op1, op2 dst := remainder of op1/op2, unsigned RRX
and dst, op1, op2 dst := bitwise AND of op1 and op2 RRX
or dst, op1, op2 dst := bitwise OR of op1 and op2 RRX
xor dst, op1, op2 dst := bitwise XOR of op1 and op2 RRX
xnor dst, op1, op2 dst := bitwise XNOR of op1 and op2 RRX
sll dst, op1, op2 dst := shift op1 logically left by op2 RRX
slr dst, op1, op2 dst := shift op1 logically right by op2 RRX
sar dst, op1, op2 dst := shift op1 arithmetically right by op2 RRX
ldhi dst, op1 dst := op1 shifted left by 16 bits RHH
beq op1, op2, offset branch to PC+4+offset*4 if op1 == op2 RRB
bne op1, op2, offset branch to PC+4+offset*4 if op1 != op2 RRB
ble op1, op2, offset branch to PC+4+offset*4 if op1 <= op2 (signed) RRB
bleu op1, op2, offset branch to PC+4+offset*4 if op1 <= op2 (unsigned) RRB
blt op1, op2, offset branch to PC+4+offset*4 if op1 < op2 (signed) RRB
bltu op1, op2, offset branch to PC+4+offset*4 if op1 < op2 (unsigned) RRB
bge op1, op2, offset branch to PC+4+offset*4 if op1 >= op2 (signed) RRB
bgeu op1, op2, offset branch to PC+4+offset*4 if op1 >= op2 (unsigned) RRB
bgt op1, op2, offset branch to PC+4+offset*4 if op1 > op2 (signed) RRB
bgtu op1, op2, offset branch to PC+4+offset*4 if op1 > op2 (unsigned) RRB
j offset jump to PC+4+offset*4 J
jr register jump to register JR
jal offset jump to PC+4+offset*4, store PC+4 in $31 J
jalr register jump to register, store PC+4 in $31 JR
trap -/- cause a trap, store PC in $30 N
rfx -/- return from exception, restore PC from $30 N
ldw dst, reg, offset dst := word @ (reg+offset) RRS
ldh dst, reg, offset dst := sign-extended halfword @ (reg+offset) RRS
ldhu dst, reg, offset dst := zero-extended halfword @ (reg+offset) RRS
ldb dst, reg, offset dst := sign-extended byte @ (reg+offset) RRS
ldbu dst, reg, offset dst := zero-extended byte @ (reg+offset) RRS
stw src, reg, offset store src word @ (reg+offset) RRS
sth src, reg, offset store src halfword @ (reg+offset) RRS
stb src, reg, offset store src byte @ (reg+offset) RRS
mvfs dst, special dst := contents of special register RH
mvts src, special contents of special register := src RH
tbs -/- TLB search N
tbwr -/- TLB write random N
tbri -/- TLB read index N
tbwi -/- TLB write index N

Integer Registers
$0 always zero $8 temporary register (caller-save) $16 register variable (callee-save) $24 temporary register (caller-save)
$1 reserved for assembler $9 temporary register (caller-save) $17 register variable (callee-save) $25 temporary register (caller-save)
$2 func return value $10 temporary register (caller-save) $18 register variable (callee-save) $26 reserved for OS kernel
$3 func return value $11 temporary register (caller-save) $19 register variable (callee-save) $27 reserved for OS kernel
$4 proc/func argument $12 temporary register (caller-save) $20 register variable (callee-save) $28 reserved for OS kernel
$5 proc/func argument $13 temporary register (caller-save) $21 register variable (callee-save) $29 stack pointer
$6 proc/func argument $14 temporary register (caller-save) $22 register variable (callee-save) $30 interrupt return address
$7 proc/func argument $15 temporary register (caller-save) $23 register variable (callee-save) $31 proc/func return address

Special Registers
0 Processor Status
1 TLB Index 2 TLB Entry High 3 TLB Entry Low 4 TLB Bad Address

Processor Status Register
31 .. 27 26 25 24 23 22 21 20 .. 16 15 .. 0
User Mode Interrupt Enable Priority Interupt Mask
Cur Prv Old Cur Prv Old 0 .. 31